Modeling High Blocking Voltage and Doping in 4H Silicon Carbide Bipolar Junction Transistors

The present study highlights modeling High Blocking Voltage and doping in 4H-SiC Bipolar Junction Transistors. the charge in the depletion region of a PN junction can be removed faster if the drift velocity is higher, and therefore, the reverse recovery time is shorter. For a given breakdown voltage, the drift region thickness and doping concentration of the punch-through structure can be optimized to give the lowest specific on-resistance. An optimization scheme was performed for a breakdown voltage of 14kV at 300K. The optimum drift region thickness and doping concentration are 114
m and 6.6 x 1014 cm-3, respectively, which gives the lowest specific on-resistance of 117m
cm2. The optimum drift region thickness and doping concentration for a 4H-SiC punch-through structure at different breakdown voltages are presented. The specific on-resistance is compared with the theoretical specific on-resistance of non-punch-through structure. It is shown that the optimized punch-through structure not only has a thinner drift region but also has a slightly lower specific on-resistance than non-punch-through structure. While the simulation results presented here have shown that these devices have excellent performance at both room temperature and 523K, further research is definitely needed in the area of device processing to demonstrate them experimentally.